current mode pwm controller lm3842a/3a/4a/5a features automatic feed forward compensation optimized for offline converter double pulse suppression current mode operation to 500 khz high gain totem pole output internally trimmed bandgap reference undervoltage lockout with hysteresis low start up current : 0.3 ma moisture sensitivity level 3 ordering information description the lm384xa are fixed frequency current-mode pwm controller. th ey are specially designed for off-line and dc-to-dc converter applications with minimal external component s. these integrated circuits features a trimmed oscillator for pre cise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensi ng comparator, and a high current totempole output ideally suited for driving a power mosfet. protection circuitry includes built in under-voltage lockout an d current limiting. simplified block diagra m absolute maximum ratings ( t a = 25 ) characteristic symbol value unit power supply voltage v cc 30 v output current i o 1 a analog inputes voltage v in -0.3 to 5.5v v error amp output sink current i sink 10 ma power dissipation p d 1w stora g e tem p erature ran g et stg -65 to 150 lead temperature (soldering 5 sec) t l 260 2008 - ver. 1.0 htc lm3842a/3a/4a/5a n 8 dip ? 1 ? device package lm3842a/3a/4a/5a d 8 sop 5v reference vcc undervoltage lockout latching pwm oscillator v ref undervoltage lockout + - vcc output ground current sense input v ref rt/ct vfb comp error amplifie r r r voltage feedback current sense r t /c t vcc output gnd v ref compen sation 8 sop/ 8 dip pin configulation 1 2 3 4 8 7 6 5 sop-8 pkg dip-8 pkg
current mode pwm controller lm3842a/3a/4a/5a electrical characteristic (vcc=15v(note 1), r t = 10k, c t =3.3nf 0 t a 70 ; unless otherwise specified) characteristic symbol test condition min typ max unit reference section reference output voltage v ref t j = 25, i o =1 ma 4.90 5.00 5.10 v line regulation vo 12v vcc 25v 2 20 mv load regulation vo 1ma io 20ma 3 25 mv output short circuit current isc t a = 25 -85 -180 ma oscillator section normal frequency f osc t j = 25 47 52 57 khz voltage stability sv 12v vcc 25v 0.2 1 % amplitude vosc 1.6 vp-p error amplifier section input b current i ib -0.1 -2 a feedback input voltage v fb vo=2.5v 2.42 2.50 2.58 v open loop voltage gain a vol 2v vo 4v 65 90 db power supplier rejection ratio psrr ea 12v vcc 25v 60 70 db output sink current i si v fb =2.7v, vo - 1.1v 27 ma output source current i so v = 2.3v, vo=5v -0.5 -1.0 ma output voltage high v oh v fb =2.7v, r l =15k to gnd 56 v output voltage low v ol v fb =2.7v, r l =15k to v rgr 0.8 1.1 v current sense section input voltage gain av (note 2 & 3) 2.85 3 3.15 v/v maximum input signal v max vo=5v (note 2) 0.9 1 1.1 v power supply rejection ratio psrr sc 12v vcc 25v 70 db input bias current i ib -3 -10 a output section i sink = 20ma 0.1 0.4 v i sink = 20ma 1.5 2.2 v i source = 20ma 13 13.5 v i source = 20ma 12 13.0 v rise time t j = 25, c l =1nf 45 150 ns fail time t j = 25, c l =1nf 35 150 ns undervoltage lockout section 14.5 16 17.5 8.5 10 11.5 pwm section 14.5 16 17.5 total standby current operating supply current i cc zener voltage v iz i i = 25ma 30 htc v ol v 38 v ma start-up current 7.8 8.4 maximum duty cycle dmax 3842a/3843a 3844a/3845a output voltage low output voltage high start threshold minimum o p eratin g volta g e (after turn-on v oh t r t t 3842a/3844a v th 8.2 v 3843a/3845a 0.17 0.3 ma 9 vcc=6.5v for 3843a/3845a 9 i st vcc=14v for 3842a/3844a 7.8 8.4 7.0 7.6 v cc(min) 3842a/3844a 3843a/3845a ? 2 ? 0.17 0.3 14 ma 17 v pin2 =v pin3 =0v v v v v
current mode pwm controller lm3842a/3a/4a/5a note: 1. adjust vcc above the start threshould before setting a t 15v. 2. parameter measured at trip point of latch with v fb - 0. 3. comparator gain defined as: fig.1 open loop test circuit high peak currents associated with capacitive loads necessitate careful grounding techniques timing and bypass capacitors should be connected close to pin 5 in a single point ground. the transistor and 5k potentiometer are used to sample the osc illator waveform and apply an adjustable ramp to pin 3. fig.2 under voltage lockout lm3842a lm3843/5a v on 16v 8.4v v off 10v 7.6v during under-voltage lock-out, the output driver is biased to a high impedance state. pin 6 should be shunted to ground with a bleeder resistor to pr event activating the power switch with output leakage current. htc ? 3 ? v output compensation(pin fb) v current sanseinput(pin cs) a = ; 1 2 3 4 8 7 6 5 comp v ref v fb v c output gnd i sense r t /c t lm3842a 0.1 0.1 a c t output 1k/1w v ref v1 r t 100k 2n 2222 4.7k e/a adjust 1k 5k i sense adjust 4.7k 7 on/off command to rest of ic < 15ma < 1ma v off v on v cc i cc
current mode pwm controller lm3842a/3a/4a/5a fi g .3 error am p confi g uration fig.4 current sense circuit peak current (i s ) is determined by the formula: i s(max) a small rc filter may be required to suppress switch transients . fig.5 oscillator waveforms and maximum duty cycle htc ? 4 ? error amp can source or sink up to 0.5ma 2 1 - + zi zf comp v fb 0.5ma 2.5v 1 3 5 i s error amp 2r r 1v current sense comparator comp current sense gnd c r s r ~ ~ 1.0v r s 8 4 5 v ref r t /c t gnd large r t small c t v 4 internal clock large r t small c t v 4 internal clock r t c t
current mode pwm controller lm3842a/3a/4a/5a duty cycle. charge and discharge times are determined by the formulas: tc 0.55 rt ct td rt ct n( ) frequency, then, is: f = (tc + td) -1 for rt>5k, f fig.6 shutdown techniques shutdown of the lm3842a can be accomplished by two methods; eit her raise pin 3 above 1v or pull pin 1 below a voltage two diode drops above ground. eithe r method causes the output of the pwm comparator to be high (refer to block diagram). the pwm l atch is reset dominant so that the output will remain low until the next clock cycle after the shoutdown condition at pins 1 and/or 3 is removed. in one example, an externally latched shutdown may be accomplished by adding an scr which will be reset by cycling vcc below the lower uvlo thr eshold. at this point the reference turns off, allowing the scr to reset. fig.7 slope compensation htc ? 5 ? ~ ~ 0.0063 r t - 2.7 0.0063 r t - 4 ~ ~ 1.8 r t c t ~ ~ 1 shutdown comp 8 3 v ref i sense 1k 330 500 shutdown to current sense-resistor 8 4 3 i sense r2 v ref r t /c t 0.1f r t c t r1 r sence c i sense lm3842a
current mode pwm controller lm3842a/3a/4a/5a a fraction of the oscillator ramp can be resistively summed wit h the current sense signal to provide slope compensation for converters requiring duty cycles over 50%. note that capacitor, c, forms a filter with r2 to suppress the leading edge switch spikes. fig.1 output dead time fig.2 timing resistor vs frequency fig.3 output saturation characteristics fig.4 error amplifier open loop gain and phase frequency pin function description pin no. function description 1 compensation this pin is the error amplifier output and is mad e available for loop compensation. 2 voltage this is the inverting input of the error amplitier . it is normally connected feedback to the switching power supply output through a resis ter divider. 3 current sense a voltage proportional to inductor current is co nnected to this input. the pwm uses this information to terminate the output switch co nduction. 4 r t /c t the oscillator frequency and maximum output duty cycle are programmed by connecting resistor r t to vr ef and capacitor c t to ground. operation to 500khz is possible. 5 gnd this pin is the combined control circuitry and power ground . 6 output this output directly drives the gate of a power mosfet. peak currents up to 1.0a are sourced and sunk by this pin. 7 vcc this pin is the positive supply of the control ic. 8 v ref this is the reference output. it provides charging current for capacito r c t through resistor r t . htc ? 6 ? 10 -3 2468 10 -1 24 8 6 4 2 0 1 3 sink (v ol ) v cc =15v t a =25 source (v cc -v oh ) v sat , output saturation voltage ( v io, output load current (a) 80 50 20 8.0 5.0 2.0 0.8 10k 20k 50k 100k 500k 1.0m 200k r t , timing resister (k fosc, frequency (khz) c t =10nf c t =5.0nf c t =2.0nf c t =1.0nf c t =500pf c t =200pf c t =100pf 100 10 30 3 1m 100k 10k 1k 100 r t (k) fosc, frequency(hz) c t =100nf c t =47nf c t =22nf c t =10nf c t =4.7nf c t =2.2nf c t =10nf 80 60 40 10k 100k 1m 1k 100 0 -135 10 -180 0 -45 20 fosc, frequency (hz) -90 10m a vol , open-loop voltage gain (d , excess phase degre e gain phase
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